Archived posting to the Leica Users Group, 2000/03/10

[Author Prev] [Author Next] [Thread Prev] [Thread Next] [Author Index] [Topic Index] [Home] [Search]

Subject: Re: [Leica] Re: Leica and the digital future
From: Brian Reid <reid@mejac.palo-alto.ca.us>
Date: Fri, 10 Mar 2000 09:59:25 -0800

> Jim, (or others) are we ever likely to see 24x36mm chips sitting
> in the back of our (by then) old 35mm cameras? 

I spent a few years working in chip fab, so let me take a stab at this.

Basically the way you make a chip is as follows:

1. Start with a round wafer of silicon that is as big as you can
muster. These days you can find 12-inch wafers; I've never personally
handled one bigger than 6 inches.

2. Chip designs are represented as "masks". Think of these masks as
high-contrast negatives with really really high resolution. A chip is a
series of layers, and there is a separate mask for each layer.

3. Cover the wafer with "resist", which is like the wax that you put on
easter eggs. Now use a machine called a "stepper" to repeatedly image
copies of the mask in rows and columns on the wafer. Each one of these
rectangles will be a chip when you are done. Sometimes the imaging,
which in the chip business is called "lithography", is done with an
electron beam and not with a negative and a stepper, but the result is
to remove some of the resist. The optical equipment is made by
companies like Canon and Nikon; the electron-beam equipment is
typically made by Perkin-Elmer. An optical stepper is a wonderful
device to behold. 

4. Do some chemical or physical processing. Dip it in an acid, or blast
it with ions, or expose it to some vapors, or whatever. This puts a
pattern on the wafer.  These steps depend heavily on what kind of chip
you are making, and are, from my point of view, entirely magic.

5. Repeat steps 3 and 4 until you are done with all of the layers. I
don't know how many layers are in a modern CCD, but back when I was
doing this, it was not uncommon to find a chip with 20 layers. 

6. Cut the wafer apart into its component rectangles. Attach each one
to a carrier, and solder some tiny little wires to it. This is called
"bonding and packaging". 

There are two ways that this process can fail:
   1. Imprecision. The layers don't line up, or the processing steps
      run too long or not long enough, so that there is a systematic 
      problem that ruins the entire wafer.

   2. Impurity. Dirt and dust and bad chemicals get on things. 

The bigger the rectangle that will become the final chip, the more
likely it is that there will be a spot of dirt on it. If the chip has 4
times the area, then it is 4 times as likely that a spot of dust will
land on it during fabrication. Usually one spot of dust on one layer is
enough to ruin the entire chip; CCDs are slightly more tolerant of that
in some layers.

It costs you the same to process a wafer whether all of the chips fail
or all of the chips work, so profitability in this business comes
entirely from "yield", from the number of chips on a wafer that
actually work.  Bigger chips are less likely to work, so are less
profitable, so they are more expensive.

Brian